1. Field of the Invention
The present invention relates to a bootstrap DC-DC converter, and more particularly, to a bootstrap DC-DC converter capable of maintaining a bootstrap voltage such that an upper gate switch is turned on normally to prevent the bootstrap DC-DC converter from turning off at a high duty cycle due to under voltage protection (UVP).
2. Description of the Prior Art
Power supply devices play important roles in the modern information technology. Among all the power supply devices, DC-DC converters have been widely used, and are mainly utilized for providing a stable output voltage for electronic elements.
In short, please refer to FIG. 1, which is a schematic diagram of a conventional bootstrap DC-DC converter 10. As shown in FIG. 1, when a clock signal VCLK is with logic high to trigger a set terminal S of an SR flip-flop 100, the SR flip-flop 100 continues to output a control signal CON in logic high to a pre-driver 102. Therefore, the pre-driver 102 controls an upper gate driver 104 and a lower gate driver 106 to output an upper gate control signal UG and a lower gate control signal LG accordingly, such that the upper gate switch 108 is turned on and the lower gate switch 110 is turned off, to output an inductance current IL by an output inductor LO and then generate an output voltage VOUT for a load RLOAD by an output capacitor CO and an effective serial resistor RESR. Then, when a feedback voltage VF (a divided voltage generated from diving the output voltage VOUT by voltage dividing resistors R1 and R2) exceeds a reference voltage VREF, an error amplifier 112 outputs an error signal EAO (wherein a compensation network 118 performs compensation) to indicate a pulse width modulation (PWM) control loop 114 to reset a reset terminal R of the SR flip-flop 100, such that the SR flip-flog 100 outputs the control signal CON in logic low. Therefore, the pre-driver 102 turns off the upper gate switch 108 and turns on the lower gate switch 110 accordingly until the clock signal VCLK switches to another logic high to trigger the set terminal S of the SR flip-flop 100. Then, the above operations are repeated.
When the lower gate control signal LG is with logic high and thus the lower gate switch 110 is turned on, a switch 116 conducts connection between a system voltage PVCC and a bootstrap capacitor CBOOT to charge the bootstrap capacitor CBOOT, where the voltage across the bootstrap capacitor is VBOOT. Therefore, when the control signal CON is with logic high to turn on the upper gate switch 108, a driving voltage of the upper gate driver 104 is high enough to turn on the upper gate switch 108, wherein a voltage of a bootstrap voltage node BOOT is an input voltage VIN plus the bootstrap voltage VBOOT across the bootstrap capacitor CBOOT, and the drain-source voltage of the upper gate switch 108 is the bootstrap voltage VBOOT. The operation of the bootstrap DC-DC converter 10 is well-known for those skilled in the art, and hence the details are omitted herein.
For this structure, when the bootstrap DC-DC converter 10 is applied for converting a voltage in a high duty cycle (e.g. a difference between the input voltage VIN and the desired output voltage VOUT is smaller), the upper gate switch 108 is almost turned on all the time and the lower gate switch 110 is only occasionally turned on. Therefore, the bootstrap capacitor CBOOT is not charged enough, which causes the upper gate switch 108 unable to turn on and power of the input voltage VIN unable to deliver to the output voltage VOUT. The bootstrap DC-DC converter 10 is therefore turned off due to under voltage protection.
For the above problem, a conventional improvement method is to add a charge pump such that a driving voltage of the upper gate driver 104 increases. However, the method consumes more layout area due to the charge pump. On the other hand, another conventional improvement method is to compare the bootstrap voltage VBOOT of the bootstrap capacitor CBOOT with a reference voltage by a comparator, and then force the lower gate switch 110 to turn on and charge the bootstrap capacitor CBOOT when the bootstrap voltage VBOOT is lower than the reference voltage. However, the method needs to implement the comparator with high voltage elements, and hence is with worse characteristics and also needs more layout area. Thus, there is a need for improvement of the prior art.